1. Technical Field of the Invention
The invention relates generally to communication systems; and, more particularly, it relates to data communication systems employing analog and digital components.
2. Description of Related Art
Data communication systems have been long been under development. One particular design direction has been the movement towards always faster operating devices within the communication system. Particularly within receivers employed within digital communication systems, the rate at which an analog to digital converter (ADC) can properly sample a received analog signal is of some critical consideration. In order to enable regeneration/re-synthesize a digitally sampled signal into the analog signal that has been actually received and sampled by the ADC, then the sampling rate of the ADC needs to be clocked at a frequency at least twice the highest frequency component in the analog received signal. This will enable that the entirety of the received signal, at least up the “highest frequency component” of interest will be able to perform accurate regeneration of the received signal.
ADCs can prove to be very real estate consumptive components within semiconductor devices. Given their oftentimes large real estate consumption, the ADCs within a semiconductor device often also prove to be large consumers of power as well. Again, a main direction of effort within data communication systems has been to increase the rate at which data may be transmitted between devices within the communication system. The ADC can prove to be one of the bottlenecks within the communication system, in that, the rate at which the ADC can sample data will limit the maximum rate at which data may be transmitted to it without losing data in the analog to digital sampling process. However, as the operating frequency, or clock frequency at which the ADC is clocked continues to increase, the device actually consumes more power and dissipates more heat. This will inherently lead to the generation and introduction of noise, at the very least thermal noise, into the other components within such a semiconductor device including the ADC that is being clocked at a very high frequency. The typical direction of effort, in continually trying to increase the clock rate at which the ADC operates to sample an incoming analog signal, competes with some other design motivations including desires to consume less power, operate at lower frequencies, and other considerations.
In addition, given that most devices seek to operate at the highest possible frequency, there is inherently ties to the fabrication processes used to make the semiconductor devices that perform these functions. In typically manufacturing, not all of a semiconductor wafer is operable to support the highest operating frequency for which the fabrication was intended. Oftentimes, some of the semiconductor wafer is still usable, but not at the highest operation frequencies that were intended beforehand. Sometimes a majority of the semiconductor wafer needs to be discarded when there are insufficient low frequency applications that are candidates to use it. This situation would be viewed as having a relatively low yield, in that, some (or even a majority) of the semiconductor wafer may not be used to perform any practical application. This is based on the typical motivation that seeks to operate most devices at the highest possible frequency, and those devices that can operate only at the lower frequencies are simply not used.
Further limitations and disadvantages of conventional and traditional systems will become apparent through comparison of such systems with the invention as set forth in the remainder of the present application with reference to the drawings.